User BookIntroductionGet started Overview Kathryn is composed of 3 major layer as followed: model layer is used for module hardware. simulation layer generation layer is used for generate Verilog file for synthesis or outside simulation 1.Model Section let's start with module declaration 2.Simulation Section Let's see simulation overview 3.Generation Section Now, we are generating the Verilog 4.see more examples Let's see how Kathryn enhance hardware design process Quick Start1.Module
