User Book
Model Section
5. Hybrid Design Flow
parallel Block

Parallel Block

In Parallel Block, every cycle considered elements (CCE) and sub Block will be taken into state-machine building, The system will be auto generate the necessary state-machine to make the hardware run parallel.

  • main.cpp
    void flow() override{
          par{
              a  <= b;
              a2 <= b;
              a3 <= b;
          }
    }
  • The state-machine will be like this

Photo

what if we have different multiple cycle in the parallel block?

In that case Kathryn will automatically sync the sub block without overhead cycle

  • main.cpp
    void flow() override{
          par{
              seq{
                  a1 <= iv;
                  b1 <= a1;
                  c1 <= b1;
                  d1 <= c1
              }
              seq{
                  a2 <= iv2;
                  b2 <= a2;
                  c2 <= b2;
              }
          }
    }
  • The state-machine will be like this. The state sXa and sXb will run simultaneously. But once second seq block is finish it will wait to sync with first seq block without overhead cycles.

Photo

what if we can't know which block is finish lastest?

In that case Kathryn will automatically build additional logic for timing synchronization and sync the sub block without overhead cycle.

  • class ExampleModule: public Module{
    public:
        mWire(i, 32);
        mReg(a, 32);mReg(b, 32);
        mReg(c, 32);mReg(d, 32);
     
        ExampleModule(int x): Module(){ i.asInputGlob(); d.asOutputGlob();}
     
        void flow() override{
            seq{ /// all sub element run [seq]uentialy
                a <<= i;
                par{ /// all sub element run parallelly
                    cdowhile(a < 8){ /// do loop
                        a <<= a + 1;
                        c <<= c + 1;
                    }
                    cdowhile(b < 8){ /// do loop
                        b <<= b + 1;
                        d <<= d + 1;
                    }
                }
                d <<= c + d;
            }
        }
    };
  • the state machine look like This
Photo