User Book
Model Section
2.Variable

Variable

Kathryn provides 3 variable type classes as followed:

1. Module variable

  • mMod(#name, #moduleType, varArgs....)
    mMod(x, ExModule, 1)
    //^----------------- example
  • this is command to build a module or submodule (depend on where it take) with
    • #name = x variable of module
    • #module = ExModule (as describe in module section)
    • #varArgs = 1 is an argument to put to module

2. Logic variable

  • TypedecarationblockedAsmnonBlockedAsm
    RegistermReg(#name, #size) yesyes
    WiremWire(#name, #size) noyes
    ValuemVal(#name, #size, #value)nono
    Nestg(#signalName ....) dep on sigTypedep on sigType
    MemBlockmMem(#name, #row, #column)yesyes
  • to slice the Logic variable operand (except memblock) using (#start, #stop) ex. mReg(myVar, 8); myVar(5, 8)

  • to index your memory block using [index] ex. mMem(myMem, 256, 8); myMem[10] or myMem[myVar] (if you use dynamic indexing you must ensure that size of indexer is equal to ceiling(log2(depth)))

  • for all logic variable assignment whether blockAsm(<=) or nonBlockAsm(=) will be considered as CYCLE CONSIDERED ELEMENT <<<CCE>>> which we will discuss in hybrid design flow section.

3. traditional C++ variable

  • all traditional C++ will be Not considered as CCE, it is only used to generate the Hardware design