User Book
Model Section
3.Operator

Operator

Kathryn provide these standard operation on Any Logic Variable (described in variable section)

  • You may notice that some of operation in Kathryn is too constrained compared to Verilog. It happens because I need to prevent bug or misunderstanding while testing the system in this version.

1. Bitwise Operation

  • TypeDeclarationSize Mismatch HandlingOutput Size
    &a & bLUEmax(sa, sb)
    |a | bLUEmax(sa, sb)
    ^a ^ bLUEmax(sa, sb)
    ~~a-sa
    <<a << b-sa
    >>a >> b-sa

2. Logical Operation

  • TypedeclarationSize Mismatch HandlingOutput Size
    &&a && bLUE1
    ||a || bLUE1
    !!a-1

3. arithmetic Operation

  • TypedeclarationSize Mismatch HandlingOutput Size
    +a + bLUEmax(sa, sb)
    -a - bLUEmax(sa, sb)
    *a * bLUEmax(sa, sb)
    /a / bLUEmax(sa, sb)
    %a % bLUEmax(sa, sb)

4. Relation Operation

  • TypeDeclarationSize Mismatch HandlingOutput Size
    ==A == BLUE1
    !=A != BLUE1
    <A < BLUE1
    <=A <= BLUE1
    >A > BLUE1
    >=A >= BLUE1
    sign less thanA.slt(B)LSE1
    sign greater thanA.sgt(B)LSE1

5. bit extension

  • TypeDeclarationNOTEOutput Size
    Bit ExtendA.extB(C)C has to be a constant C++ integerC
    Unsigned ExtendA.uext(C)C has to be a constant C++ integerC
    Signed ExtendA.sext(C)C has to be a constant C++ integerC