User Book
Model Section
3.Operator

Operator

Kathryn provide these standard operation on Any Logic Variable (described in variable section)

  • You may notice that some of operation in Kathryn is too constrained compared to Verilog. It happens because I need to prevent bug or misunderstanding while testing the system in this version.

1. Bitwise Operation

  • TypedecarationOperand Size Constrain
    &a & bsizeDes == sizeA == sizeB
    |a | bsizeDes == sizeA == sizeB
    ^a ^ bsizeDes == sizeA == sizeB
    ~~asizeDes == sizeA
    <<a << bsizeDes == sizeA
    >>a >> bsizeDes == sizeA

2. Logical Operation

  • TypedecarationOperand Size Constrain
    &&a && bsizeDes =1; sizeA == sizeB
    !!asizeDes =1;

3. arithmetic Operation

  • TypedecarationOperand Size Constrain
    +a + bsizeDes == sizeA == sizeB
    -a - bsizeDes == sizeA == sizeB
    *cnspn/a
    /cnspn/a
    %cnspn/a
  • cnsp = currently not support