Assignment Operator
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Assignable operator enables designers to update some solid logic components: Register, Wire, Nest, indexed MemBlk with any readable signal or constant. Moreover, in Kathryn, every assignable operator has been considered as a Cycle Considered Element (CCE). Kathryn uses CCE to determine the cycle timing of the operation.
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Type Declaration Description Support Destinated Hw Resource Block Assignment A <<= B “A” will be assigned to “B” at the Next Positive edge clock cycle. Register, MemBlk, Nest(depending on root variable) Non-Block Assignment A = B “A” will be assigned to “B” at the current cycle. Register, Wire, Nest(depending on root variable)